MPEG decoder system and method having a unified memory for transport decode and system controller functions

DC CAFC

US 5,870,087 A
Filed: 11/13/1996
Issued: 02/09/1999
Est. Priority Date: 11/13/1996
Status: Expired due to Term

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1. An MPEG decoder system which includes a single memory for use by transport, decode and system controller functions, comprising:

a channel receiver for receiving and MPEG encoded stream;

transport logic coupled to the channel receiver which demultiplexes one or more multimedia data streams from the encoded stream;

a system controller coupled to the transport logic which controls operations within the MPEG decoder system;

an MPEG decoder coupled to receive one or more multimedia data streams output from the transport logic, wherein the MPEG decoder operates to perform MPEG decoding on the multimedia data streams; and

a memory coupled to the MPEG decoder, wherein the memory is used by the MPEG decoder during MPEG decoding operations, wherein the memory stores code and data useable by the system controller which enables the system controller to perform control functions within the MPEG decoder system, wherein the memory is used by the transport logic for demultiplexing operations;

wherein the MPEG decoder is operable to access the memory during MPEG decoding operations;

wherein the transport logic is operable to access the memory to store and retrieve data during demultiplexing operations; and

wherein the system controller is operable to access the memory to retrieve code and data during system control functions.

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Abstract

An MPEG decoder system and method for performing video decoding or decompression which includes a unified memory for multiple functions according to the present invention. The video decoding system includes transport logic, a system controller, and MPEG decoder logic. The video decoding system of the present invention includes a single unified memory which stores code and data for the transport, system controller and MPEG decoder functions. The single unified memory is preferably a 16 Mbit memory. The MPEG decoder logic includes a memory controller which couples to the single unified memory, and each of the transport logic, system controller and MPEG decoder logic access the single unified memory through the memory controller. The video decoding system implements various frame memory saving schemes, such as compression or dynamic allocation, to more efficiently use the memory. In one embodiment, the memory is not required to store reconstructed frame data during B-frame reconstruction, thus considerably reducing the required amount of memory for this function. Alternatively, the memory is only required to store a portion of the reconstructed frame data. In addition, these savings in memory allow portions of the memory to also be used for transport and system controller functions. The present invention thus provides a video decoding system with reduced memory requirements.

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20 Claims

1. An MPEG decoder system which includes a single memory for use by transport, decode and system controller functions, comprising:
- a channel receiver for receiving and MPEG encoded stream;
  
  transport logic coupled to the channel receiver which demultiplexes one or more multimedia data streams from the encoded stream;
  
  a system controller coupled to the transport logic which controls operations within the MPEG decoder system;
  
  an MPEG decoder coupled to receive one or more multimedia data streams output from the transport logic, wherein the MPEG decoder operates to perform MPEG decoding on the multimedia data streams; and
  
  a memory coupled to the MPEG decoder, wherein the memory is used by the MPEG decoder during MPEG decoding operations, wherein the memory stores code and data useable by the system controller which enables the system controller to perform control functions within the MPEG decoder system, wherein the memory is used by the transport logic for demultiplexing operations;
  
  wherein the MPEG decoder is operable to access the memory during MPEG decoding operations;
  
  wherein the transport logic is operable to access the memory to store and retrieve data during demultiplexing operations; and
  
  wherein the system controller is operable to access the memory to retrieve code and data during system control functions.
- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
- - 2. The MPEG decoder system of claim 1, wherein the MPEG decoder includes a memory controller coupled to the memory;
    - wherein the transport logic is coupled to the memory controller and is operable to access the memory through the memory controller; and
      
      wherein the system controller is coupled to the memory controller and is operable to access the memory through the memory controller.
  - 3. The MPEG decoder system of claim 2, wherein the memory controller is operable to store compressed data in the memory to reduce memory storage requirements.
  - 4. The MPEG decoder system of claim 2, wherein the memory controller is operable to dynamically allocate segments of memory space in the memory to optimize memory use.
  - 5. The MPEG decoder system of claim 1, wherein the memory stores anchor frame data during reconstruction of temporally compressed frames.
  - 6. The MPEG decoder system of claim 1, wherein said memory has a memory size which does not exceed 16 Mbit.
  - 7. The MPEG decoder system of claim 1, wherein said memory includes a plurality of memory portions, wherein said memory includes a video frame portion for storing video frames, a system controller portion for storing code and data executable by the system controller, and a transport buffer portion for storing data used by the transport logic.
  - 8. The MPEG decoder system of claim 7, wherein said memory further includes a video decode buffer portion for storing decoded video data, a video display sync buffer, and an on-screen display buffer.
  - 9. The MPEG decoder system of claim 8, wherein said memory further includes one or more audio buffers for storing audio data.

10. A method for performing video decoding in an MPEG decoder system which includes a single memory for use by transport, decode and system controller functions, the method comprising:
- receiving an MPEG encoded stream;
  
  demultiplexing one or more multimedia data streams from the encoded stream, wherein said demultiplexing one or more multimedia data streams from the encoded stream operates using a first unified memory;
  
  performing MPEG decoding on the multimedia data streams, wherein said performing MPEG decoding operates using said first unified memory; and
  
  a system controller controlling operations within the MPEG decoder system, wherein said controlling operations accesses code and data from said first unified memory;
  
  wherein said demultiplexing one or more multimedia data streams, said performing MPEG decoding, and said controlling operations each use said first unified memory.
- View Dependent Claims (11, 12, 13, 14, 15)
- - 11. The method of claim 10,wherein said demultiplexing one or more multimedia data streams from the encoded stream includes accessing multimedia data stream data from said first unified memory;
    - wherein said performing MPEG decoding on the multimedia data streams includes accessing video frame data from said first unified memory; and
      
      wherein said controlling operations includes accessing code and data from said first unified memory.
  - 12. The method of claim 11, wherein the MPEG decoder system includes a memory controller coupled to the first unified memory;
    - wherein said accessing multimedia data stream data from said first unified memory comprises accessing said multimedia data stream data through the memory controller;
      
      wherein said accessing video frame data from said first unified memory comprises accessing said video frame data through the memory controller; and
      
      wherein said accessing code and data from said first unified memory comprises accessing said code and data through the memory controller.
  - 13. The method of claim 10, wherein the MPEG decoder system includes a memory controller coupled to the first unified memory, the method further comprising:
    - the memory controller storing compressed data in the first unified memory to reduce memory storage requirements.
  - 14. The method of claim 10, wherein the MPEG decoder system includes a memory controller coupled to the first unified memory, the method further comprising:
    - the memory controller dynamically allocating segments of memory space in the first unified memory to optimize memory use.
  - 15. The method of claim 10, wherein said first unified memory has a memory size which does not exceed 16 Mbit.

16. A video decoder system which includes a single memory for use by transport, decode and system controller functions, comprising:
- a channel receiver for receiving an encoded video stream;
  
  transport logic coupled to the channel receiver which demultiplexes one or more multimedia data streams from the encoded stream;
  
  a system controller coupled to the transport logic which controls operations within the video decoder system;
  
  a video decoder coupled to receive one or more multimedia data streams output from the transport logic, wherein the video decoder operates to perform video decoding on the multimedia data streams; and
  
  a memory coupled to the video decoder, wherein the memory is used by the video decoder during video decoding operations, wherein the memory stores code and data useable by the system controller which enables the system controller to perform control functions within the video decoder system, wherein the memory is used by the transport logic for demultiplexing operations;
  
  wherein the video decoder is operable to access the memory during video decoding operations;
  
  wherein the transport logic is operable to access the memory to store and retrieve data during demultiplexing operations; and
  
  wherein the system controller is operable to access the memory to retrieve code and data during system control functions.
- View Dependent Claims (17, 18, 19, 20)
- - 17. The video decoder system of claim 16, wherein the video decoder includes a memory controller coupled to the memory;
    - wherein the transport logic is coupled to the memory controller and is operable to access the memory through the memory controller; and
      
      wherein the system controller is coupled to the memory controller and is operable to access the memory through the memory controller.
  - 18. The video decoder system of claim 17, wherein the memory controller is operable to store compressed data in the memory to reduce memory storage requirements.
  - 19. The video decoder system of claim 17, wherein the memory controller is operable to dynamically allocate segments of memory space in the memory to optimize memory use.
  - 20. The video decoder system of claim 16, wherein said memory has a memory size which does not exceed 16 Mbit.

Specification

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Litigation Data

Current Assignee
Avago Technologies General IP PTE Limited (Broadcom, Inc.)
Original Assignee
LSI Logic Corporation (Broadcom, Inc.)
Inventors
Chau, Kwok Kit
Primary Examiner(s)
Nguyen, Phu K.
Assistant Examiner(s)
Vo, Cliff N.

Application Number

US08/748,269
Time in Patent Office

818 Days
Field of Search

345/302, 345/418, 707/101, 707/102, 707/103, 707/104
US Class Current

715/202
CPC Class Codes

H04N 19/423   characterised by memory arr...

H04N 19/427   Display on the fly, e.g. si...

H04N 19/428   Recompression, e.g. by spat...

H04N 19/61   in combination with predict...

H04N 21/426   Internal components of the ...

H04N 21/4435   Memory management allocatio...

H04N 5/46   for receiving on more than ...

MPEG decoder system and method having a unified memory for transport decode and system controller functions

First Claim

8 Assignments

Litigations

3 Petitions

Accused Products

Abstract

143 Citations

20 Claims

Specification

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MPEG decoder system and method having a unified memory for transport decode and system controller functions

First Claim

8 Assignments

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Litigations

3 Petitions

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Accused Products

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Abstract

143 Citations

20 Claims

Specification

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Use Cases

Quick Links

Others