Multimedia card interface method, computer program product and apparatus
DC
First Claim
Patent Images
1. A method comprising:
- driving information comprising a first information portion and a second information portion from a first unit to a second unit over a bus having a signal line by;
driving the first information portion from the first unit to the second unit over the signal line during a command execution;
driving the signal line from the second unit to cause a change of state during the command execution;
interpreting the change of state of the signal line at the first unit to have a first meaning and in response driving the second information portion to the signal line from the first unit during the command execution;
driving the signal line from the second unit to cause again the change of state during the command execution; and
interpreting at the first unit the change of state of the signal line occurring after driving the second information portion to the signal line to have a second meaning different from the first meaning.
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Litigations
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Accused Products
Abstract
A method to communicate data from a first unit to a second unit over a bus includes initiating an n-block data transfer, where n>1; for a first n−1 data blocks transferred from the first unit to the second unit, controlling a status signal generated by the second unit to be a buffer busy/ready status signal after each of the n−1 data blocks to inform the first unit of when the first unit may transfer the next data block; and for the nth data block transferred from the first unit to the second unit, controlling the status signal to be a programming busy/ready status signal after the nth data block to inform the first unit of a termination of internal programming, if any, by the second unit.
20 Citations
21 Claims
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1. A method comprising:
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driving information comprising a first information portion and a second information portion from a first unit to a second unit over a bus having a signal line by; driving the first information portion from the first unit to the second unit over the signal line during a command execution; driving the signal line from the second unit to cause a change of state during the command execution; interpreting the change of state of the signal line at the first unit to have a first meaning and in response driving the second information portion to the signal line from the first unit during the command execution; driving the signal line from the second unit to cause again the change of state during the command execution; and interpreting at the first unit the change of state of the signal line occurring after driving the second information portion to the signal line to have a second meaning different from the first meaning.
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2. A computer-readable medium embodying program instructions for performing operations, the operations comprising:
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driving information comprising a first information portion and a second information portion from a first unit to a second unit over a bus having a signal line by; driving the first information portion from the first unit to the second unit over the signal line during a command execution; driving the signal line from the second unit to cause a change of state during the command execution; interpreting the change of state of the signal line at the first unit to have a first meaning and in response driving the second information portion to the signal line from the first unit during the command execution; driving the signal line from the second unit to cause again the change of state during the command execution; and interpreting at the first unit the change of state of the signal line occurring after driving the second information portion to the signal line to have a second meaning different from the first meaning.
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3. Apparatus to interface a first unit to a second unit over a bus that comprises a signal line, comprising:
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a driver at said first unit coupled to said signal line and a receiver at said first unit coupled to the signal line, said driver being operable to drive information comprising a first information portion and then a second information portion from the first unit to the second unit over the signal line during a command execution, said receiver being operable to receive a change of state of the signal line driven from the second unit during the command execution both after receipt of the first information portion and after receipt of the second information portion at the second unit; and a controller at said first unit to interpret the change of state of the signal line to have a first meaning after the first information portion is driven by the driver during the command execution and to have a second meaning different from the first meaning after the second information portion is driven by the driver during the command execution from the first unit to the second unit over the signal line. - View Dependent Claims (4)
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5. Apparatus to interface a first unit to a second unit over a bus that comprises a signal line, comprising:
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a driver at said first unit coupled to said signal line and a receiver at said first unit coupled to the signal line, said receiver being operable to receive information comprising a first information portion and then a second information portion from the second unit over the signal line during a command execution;
said driver being operable to drive a change of state of the signal line to the second unit during the command execution both after receipt of the first information portion and after receipt of the second information portion; anda controller at said first unit to cause the change of state of the signal line to have a first meaning after receiving the first information portion during the command execution and to have a second meaning different from the first meaning after receiving the second information portion during the command execution from the second unit over the signal line. - View Dependent Claims (6)
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7. A method comprising:
communicating data from a first unit to a second unit over a bus by; initiating an n-block data transfer with a multiple-block transfer command, where n>
1;for a first n−
1 data blocks transferred from the first unit to the second unit, controlling a status signal generated by the second unit to be a buffer busy/ready status signal within the multiple-block transfer command after each of the n−
1 data blocks to inform the first unit of when the first unit may transfer the next data block; andfor the nth data block transferred from the first unit to the second unit, controlling said status signal to be a programming busy/ready status signal within the multiple-block transfer command after the nth data block to inform the first unit of a termination of internal programming, if any, by the second unit. - View Dependent Claims (8, 9, 10)
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11. A computer-readable medium embodying program instructions for performing operations, the operations comprising:
communicating data from a first unit to a second unit over a bus by; initiating an n-block data transfer with a multiple-block transfer command, where n>
1;for a first n−
1 data blocks transferred from the first unit to the second unit, controlling a status signal generated by the second unit to be a buffer busy/ready status signal within the multiple-block transfer command after each of the n−
1 data blocks to inform the first unit of when the first unit may transfer the next data block; andfor the nth data block transferred from the first unit to the second unit, controlling said status signal to be a programming busy/ready status signal within the multiple-block transfer command after the nth data block to inform the first unit of a termination of internal programming, if any, by the second unit. - View Dependent Claims (12, 13, 14)
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15. Apparatus to communicate data from a first unit to a second unit over a bus, comprising:
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a controller to initiate an n-block data transfer with a multiple-block transfer command, where n>
1,where for a first n−
1 data blocks transferred from the first unit to the second unit, said second unit controls a status signal to be a buffer busy/ready status signal within the multiple-block transfer command after each of the n−
1 data blocks to inform the first unit of when the first unit may transfer the next data block; andfor the nth data block transferred from the first unit to the second unit, said second unit controls said status signal to be a programming busy/ready status signal within the multiple-block transfer command after the nth data block to inform the first unit of a termination of internal programming, if any, by the second unit. - View Dependent Claims (16, 17, 18)
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19. A memory device comprising:
a bus interface configured to be coupled to a host through a bus having a data signal line, the bus interface further comprising a driver at said memory device coupled to said data signal line and a receiver at said memory device coupled to the data signal line, said receiver being operable to receive information comprising a first information portion and a second information portion from the host over the data signal line within a command execution;
said driver being operable to drive a change of state of the data signal line to the host within the command execution;
said bus interface further comprising a controller coupled to said driver and to said receiver and operable to cause the change of state of the data signal line to have a first meaning after receiving the first information portion within the command execution and to have a second meaning different from the first meaning after receiving the second information portion within the command execution from the host over the data signal line.- View Dependent Claims (20, 21)
Specification
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Litigation Data
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Current AssigneeMemory Technologies LLC (Pendrell Corporation)
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Original AssigneeNokia Corporation
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InventorsHyvonen, Jani, Mylly, Kimmo
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Primary Examiner(s)Myers, Paul R
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Assistant Examiner(s)MISIURA, BRIAN THOMAS
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Application NumberUS11/250,711Publication NumberTime in Patent Office1,376 DaysField of Search370/450, 370/454, 711/103US Class Current710/105CPC Class CodesG06F 13/4291 using a clocked protocolG11C 7/1051 Data output circuits, e.g. ...G11C 7/1063 Control signal output circu...
