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Processor which can favorably execute a rounding process composed of positive conversion and saturated calculation processing

DC
  • US RE43,729 E1
  • Filed: 04/22/2011
  • Issued: 10/09/2012
  • Est. Priority Date: 11/28/1997
  • Status: Expired due to Term
First Claim
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1. A processor that decodes and executes instructions,the processor comprising:

  • a detecting unit for detecting whether an instruction to be decoded is a predetermined instruction; and

    a rounding unit for rounding, when the detecting unit is detecting that the instruction is the predetermined instruction, a signed m-bit integer stored at an operand designated by the predetermined instruction to a value expressed as an unsigned s-bit integer wherein s is less than m.

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