Method and apparatus for preserving precise exceptions in binary translated code
First Claim
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1. In a computer system adapted to executing binary translated code, a method for responding to an exception comprising the steps of:
- defining a plurality of recovery points in the binary translated code, each of said plurality of recovery points comprising an executable instruction;
prior to execution of said executable instruction, saving the address of said executable instruction;
executing subsequent instructions;
detecting an exception;
invoking an exception handler;
reconfiguring the state of the computer system to reflect the state of the computer system at said executable instruction;
using run-time information, translating foreign code beginning at an instruction corresponding to said executable instruction; and
determining if said exception re-occurs.
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Abstract
The present invention provides a system and method for determining the cause of an exception and for reliably handling precise exceptions in a computer system that executes a plurality of operations in parallel. Binary compilation techniques are used to port code from a foreign architecture to a host architecture but in order to exploit the parallelism of the host processor architecture in binary translated code, the code must optimized by extracting the inherent parallelism of the foreign code while maintaining precise exceptions. Because the optimization process violates precise exception order, the host computer system uses a speculative mode of execution whereby the host computer system puts a speculative value into the destination register. To denote that a speculative value is stored in the register, an additional bit is associated with every host register to indicate that the operand is speculative. It is only after the speculative value is consumed by an operation in non-speculative mode, that a real exception will be invoked. The method and apparatus of the present invention further preserves the data and conditions that gave rise to the exception. The present invention minimizes the time to recover from an exception by minimizing the side effects that must be handled to recover from exceptions but extracts performance improvements associated with executing operations in parallel while achieving precise exception maintenance.
75 Citations
34 Claims
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1. In a computer system adapted to executing binary translated code, a method for responding to an exception comprising the steps of:
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defining a plurality of recovery points in the binary translated code, each of said plurality of recovery points comprising an executable instruction;
prior to execution of said executable instruction, saving the address of said executable instruction;
executing subsequent instructions;
detecting an exception;
invoking an exception handler;
reconfiguring the state of the computer system to reflect the state of the computer system at said executable instruction;
using run-time information, translating foreign code beginning at an instruction corresponding to said executable instruction; and
determining if said exception re-occurs. - View Dependent Claims (2, 3, 4, 6, 7, 8, 9)
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5. The method of claim 5 wherein said step of defining said plurality of recovery points is performed at run-time.
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10. In a computer system adapted for executing optimized binary translated code while maintaining precise exception order, said computer system comprising:
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a processing unit for executing a sequence of instructions, each of said instructions comprising a plurality of operations that may be executed in parallel;
each of said operations having at least one operand;
said processing unit adapted to detect the occurrence of an exception;
a register set for holding results of said operations and the state of said computer system as determined by execution of said operations and for storing the value of said at least one operand prior to executing said each of said instructions; and
an exception handler adapted to access said register set to recover the value of said operand and to generate an intermediate state representative of the state of said processing unit prior to the detection of the exception. - View Dependent Claims (11, 12, 13, 15, 16, 18, 19)
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14. In a computer system adapted for executing optimized binary translated code while maintaining precise exception order of foreign code, a method for recovering from a detected exception comprising the steps of:
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documenting information representative of the state of said computer system;
executing at least a first instruction, said first instruction having a plurality of operations executed in speculative mode;
executing a second instruction;
detecting whether the execution of said second instruction generated an exception;
upon detection of an exception, transferring information to a register set;
repeating execution of said at least a first instruction; and
transferring program execution to an exception handler.
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17. In a computer system adapted for executing optimized binary translated code while maintaining precise exception processing of foreign code comprising the steps of:
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A) Executing a first sequence of instructions in a speculative mode where each of said instructions comprise a plurality of operations which may be executed in parallel;
B) Saving the address of at least one of the instructions in said sequence of instructions in a storage location;
C) Saving the status of said computer system in a second storage location each time said at least one of the instructions is executed;
D) Executing a next to occur instruction in said first sequence of instructions;
E) Detecting whether the execution of said next to occur instruction generated an exception;
F) If an exception is detected, recovering said address from said storage location;
G) Recovering said system status from said second storage location;
H) Repeating the execution of said first sequence of instructions beginning at said at least one of the instructions whereby each of said operations are executed in-order; and
I) If said first sequence of instructions are executed and an exception is not detected;
J) Committing said status of said computer system to a register set; and
K) Repeating steps A) through F) for a second sequence of instructions.
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20. A method of optimizing binary translated code by extracting the parallelism inherent to foreign code during the binary translation process;
- said optimizing comprising the sequential reordering of operations and memory access without violating precise exception order in binary translated code executing on a host platform having explicit parallelism architecture, said method comprising the steps of;
a) allocating a set of registers and a dedicated memory region for storing information regarding the location of a foreign register set in said register set;
b) designating a set of Recovery Points in said binary translated code where each Recovery Point in the binary translated code has correspondence with an instruction in the foreign code, and each Recovery Point is associated with a documentation set, saved on hard disk or in memory, that contains information where all foreign registers are located in the host registers in the optimized binary translated code;
c) responding to an exception between adjacent Recovery Points by reinvoked the interpretation of foreign instructions in sequential fashion by starting execution from the previous Recovery Point, i.e. foreign context (foreign registers and memory) must not be changed in the optimized binary translated code irretrievably. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 32, 33)
- said optimizing comprising the sequential reordering of operations and memory access without violating precise exception order in binary translated code executing on a host platform having explicit parallelism architecture, said method comprising the steps of;
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29. In a computer system adapted to executing a computer program comprising binary translated code, a method for reconstructing the cause of an exception comprising the steps of:
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temporarily preserving register data and system status information before executing instructions that will calculate a variable;
invoking an exception handler prior to generating side effects;
responding to said exception with said exception handler using said temporarily preserved register data to redirect operation of said computer program
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34. A computer system adapted for executing a computer program comprising binary translated code comprising:
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a first memory for storing foreign code;
a second memory for storing optimized binary translated code;
a recovery point register for storing the address of a selected instruction in said binary translated code;
a processor for executing binary translated code and adapted for detecting the occurrence of an exception;
said processor coupled to said recovery point register and to said first and second memory;
an exception handler, coupled to said processor, for recovering the address stored in said recovery point register in response to detection of an exception by said processor, said address corresponding to one instruction in said foreign code; and
a set of documentation stored in said second memory for preserving register data and system status information of the state of said computer system prior to detection of said exception;
means for translating said foreign code to obtain sequential binary code corresponding to a portion of foreign code beginning at said one instruction in said foreign code.
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Specification
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Current AssigneeElbrus International Limited
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Original AssigneeElbrus International Limited
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InventorsRozhkov, Sergey A., Babaian, Boris A., Yakushev, Andrew V., Gushchin, Vladimir M.
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Granted Patent
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Time in Patent OfficeDays
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Field of Search
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US Class Current717/137
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CPC Class CodesG06F 12/1036 for multiple virtual addres...G06F 9/45504 Abstract machines for progr...G06F 9/45554 Instruction set architectur...
