Analog implementation of spread spectrum frequency modulation in a programmable phase locked loop (PLL) system
First Claim
Patent Images
1. A phase locked loop circuit comprising:
- a signal generator; and
a spread spectrum modulator coupled to the signal generator, wherein the spread spectrum modulator receives a control voltage as an input and provides a spread spectrum control voltage to the signal generator in response to the control voltage.
1 Assignment
0 Petitions
Accused Products
Abstract
A PLL circuit is described. The PLL circuit includes: a signal generator; and a spread spectrum modulator coupled to the signal generator, where the spread spectrum modulator receives a control voltage as an input and provides a spread spectrum control voltage to the signal generator in response to the control voltage. In one embodiment, the spread spectrum modulator includes at least one selector, where the at least one selector selects a plurality of voltage levels that correspond to a spread mode and percentage of spread for the spread spectrum modulator.
14 Citations
33 Claims
-
1. A phase locked loop circuit comprising:
-
a signal generator; and
a spread spectrum modulator coupled to the signal generator, wherein the spread spectrum modulator receives a control voltage as an input and provides a spread spectrum control voltage to the signal generator in response to the control voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
-
- 17. A phase locked loop circuit comprising a spread spectrum modulator, the spread spectrum modulator comprising a voltage divider and a selector coupled to the voltage divider, wherein the selector selects a plurality of voltages that correspond to a spread rate and percentage of spread for the spread spectrum modulator.
-
26. A method of providing an output clock signal, the method comprising:
-
spreading a control voltage utilizing an analog voltage controlled spread spectrum modulator to provide a spread spectrum control voltage; and
generating an output clock signal in response to the spread spectrum control voltage. - View Dependent Claims (27, 28, 29)
-
-
30. A phase locked loop comprising:
-
means for spreading a control voltage, wherein said means for spreading uses analog voltage controlled spread spectrum modulation and provides a spread spectrum control voltage; and
means for generating an output clock signal, wherein the means for generating generates the output clock signal in response to the spread spectrum control voltage. - View Dependent Claims (31, 32, 33)
-
Specification