Semiconductor device and its manufacturing method
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Accused Products
Abstract
A method for manufacturing a semiconductor device wherein both the threshold voltages of an N-type MISFET and a P-type MISFET are low, device can be easily manufactured at a lower cost and a higher product yield, and the reliability of the gate insulation film is higher. The gate insulation film is formed on the surface of a silicon substrate 1 in N-type MISFET forming region and the P-type MISFET forming region, and metal gates 4 and 5 are provided thereon. The metal gate 4 is made from a TiCoN film, and the work function thereof is set at 4.0 to 4.8 eV suited to the gate electrode material of the N-type MISFET. The metal gate 5 is formed from a portion of the TiCoN film by ion-implantation of oxygen into the TiCoN film configuring the gate electrode 4 at a dosage of 1013 to 1014 (ions/cm2) to raise the work function by around 0.2 to 0.8 eV.
70 Citations
43 Claims
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1-2. -2. (canceled)
- 3. A semiconductor device comprising an N-channel metal-insulator-semiconductor field-effect transistor and a P-channel metal-insulator-semiconductor field-effect transistor, characterized in that said N-channel metal-insulator-semiconductor field-effect transistor includes a gate electrode made of a metallic, alloy or metal nitride film doped with oxygen or fluorine, and that said P-channel metal-insulator-semiconductor field-effect transistor includes a gate electrode formed in a common layer with said gate electrode of said N-channel metal-insulator-semiconductor field-effect transistor and made from a portion of said common layer doped with oxygen or fluorine more heavily than said gate electrode of said N-channel metal-insulator-semiconductor field-effect transistor.
- 4. A semiconductor device comprising an N-channel metal-insulator-semiconductor field-effect transistor and a P-channel metal-insulator-semiconductor field-effect transistor, characterized in that said N-channel metal-insulator-semiconductor field-effect transistor includes a gate electrode made from a metallic, alloy or metal nitride film, and that said P-channel metal-insulator-semiconductor field-effect transistor includes a gate electrode formed in a common layer with said gate electrode of said N-channel metal-insulator-semiconductor field-effect transistor and made from a portion of said common layer doped with oxygen or fluorine.
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13. A semiconductor device comprising an N-channel metal-insulator-semiconductor field-effect transistor and a P-channel metal-insulator-semiconductor field-effect transistor, characterized in that each of said N-channel metal-insulator-semiconductor field-effect transistor said P-channel metal-insulator-semiconductor field-effect transistor includes a gate insulation film and a gate electrode formed on said gate insulation film, that one of said gate electrodes includes a first film formed on said gate insulation film and made of a first material which is either a metal, an alloy or a nitride of a metal, and a second film formed on said first film and made of a second material which is either a metal, an alloy or a nitride of a metal, and that the other of said gate electrodes includes a third film formed on said gate insulation film and made of said first material having a larger thickness than said first film
wherein a difference between a work function of said one of said gate electrodes and a work function of said other of said gate electrodes is not less that 0.1 eV.
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15. A semiconductor device comprising an N-channel metal-insulator-semiconductor field-effect transistor and a P-channel metal-insulator-semiconductor field-effect transistor, characterized in that each of said N-channel metal-insulator-semiconductor field-effect transistor and said P-channel metal-insulator-semiconductor field-effect transistor includes a gate insulation film and a gate electrode formed on said gate insulation film, that one of said gate electrodes includes a first film formed on said gate insulation film and made of a first material which is either a metal, an alloy or a nitride of a metal, and a second film formed on said first film and made of a second material which is either a metal, an alloy or a nitride of a metal, and that the other of said gate electrodes includes said first film and a third film formed on said first film and made of a third material which is either a metal, an alloy or a nitride of a metal,
wherein a difference between a work function of said one of said gate electrodes and a work function of said other of said gate electrodes is not less that 0.1 eV.
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16. (canceled)
- 24. A method for manufacturing a semiconductor device including a metal-insulator-semiconductor field-effect transistor, comprising the steps of forming a gate insulation film on a semiconductor substrate in an area for forming the metal-insulator-semiconductor field-effect transistor, forming a film made of a metal, an alloy or a metal nitride on said gate insulation film, selectively introducing oxygen or fluorine into said film, selectively removing said film to configure a gate electrode pattern, and implanting impurities into a surface area of said semiconductor substrate by using said gate electrode as a mask to thereby form source and drain.
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25. A method for manufacturing a semiconductor device including an N-channel metal-insulator-semiconductor field-effect transistor and a P-channel metal-insulator-semiconductor field-effect transistor, comprising the steps of forming a gate insulation film on a semiconductor substrate in both the areas for forming said N-channel metal-insulator-semiconductor field-effect transistor and said P-channel metal-insulator-semiconductor field-effect transistor, forming a film made of a metal, an alloy or a metal nitride on said gate insulation film, selectively introducing oxygen or fluorine into said film in said area for forming said P-channel metal-insulator-semiconductor field-effect transistor, selectively removing said film to configure a gate electrode pattern, and selectively implanting impurities into a surface area of said semiconductor substrate by using said gate electrode of said N-channel metal-insulator-semiconductor field-effect transistor and said gate electrode of said P-channel insulated-gage field-effect transistor as a mask to thereby form sources and drains.
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27. A method for manufacturing a semiconductor device including an N-channel metal-insulator-semiconductor field-effect transistor and a P-channel metal-insulator-semiconductor field-effect transistor, comprising the steps of forming dummy gate electrodes on a semiconductor substrate in both areas for forming the N-channel metal-insulator-semiconductor field-effect transistor and the P-channel metal-insulator-semiconductor field-effect transistor, introducing impurities into a surface area of said semiconductor substrate by using said dummy gate electrodes as a mask to thereby form sources and drains, heat treating for activation of said impurities, forming an interlayer dielectric film so as to embed peripheries of dummy gate electrodes, removing said dummy gate electrodes to thereby form grooves in said interlayer dielectric film, forming a gate insulation film at least in said grooves, forming a film made of a metal, an alloy or a nitride of a metal on said gate insulation film, selectively introducing oxygen or fluorine in said film in said area for forming said P-channel metal-insulator-semiconductor field-effect transistor, and selectively removing said film to thereby configure a gate electrode pattern.
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29-30. -30. (canceled)
Specification
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Current AssigneeGodo Kaisha IP Bridge 1 (IP Bridge, Inc.)
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Original AssigneeNEC Corporation
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InventorsYoshihara, Takuya
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Granted Patent
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Time in Patent OfficeDays
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Field of Search
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US Class Current257/371
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CPC Class CodesH01L 21/823437 with a particular manufactu...H01L 21/823462 with a particular manufactu...H01L 21/823828 with a particular manufactu...H01L 21/823857 with a particular manufactu...
