ELECTRICAL DEVICE WITH TEETH JOINING LAYERS AND METHOD FOR MAKING THE SAME
First Claim
Patent Images
1. A process of making an electrical device, the process including:
- producing a dielectric material comprised of a top surface with cavities remaining from removing a portion of the dielectric material; and
building up a conductive layer on the dielectric material to fill the cavities to form teeth set in and under the top surface of the dielectric material and form a portion of circuitry of the electrical device, wherein a plurality of the cavities are obtuse with respect to the top surface, and a plurality of the cavities are at least 1 tenth of a mil deep and less than 1.75 tenths of a mil deep.
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0 Petitions
Accused Products
Abstract
A multilayer electrical device, such as a printed circuit board, having a tooth structure including a metal layer set in a dielectric. The device includes a base; a conductive layer adjacent to the base; a dielectric material adjacent to conductive layer; a tooth structure including a metal layer set in the dielectric material to join the dielectric material to the metal layer; and wherein the metal layer forms a portion of circuitry in a circuit board having multiple layers of circuitry.
40 Citations
1 Claim
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1. A process of making an electrical device, the process including:
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producing a dielectric material comprised of a top surface with cavities remaining from removing a portion of the dielectric material; and building up a conductive layer on the dielectric material to fill the cavities to form teeth set in and under the top surface of the dielectric material and form a portion of circuitry of the electrical device, wherein a plurality of the cavities are obtuse with respect to the top surface, and a plurality of the cavities are at least 1 tenth of a mil deep and less than 1.75 tenths of a mil deep.
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Specification
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Current AssigneeContinental Circuits LLC (Chicago Harbor Innovation Producers, LLC)
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Original AssigneePeter k. Trzyna Revocable Trust
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InventorsSpotts, Ralph Leo JR., McGowan, Daniel, McDermott, Brian J., Tryzbiak, Sid
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Granted Patent
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Time in Patent OfficeDays
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Field of Search
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US Class Current427/98.6
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CPC Class CodesH05K 1/0296 Conductive pattern lay-out ...H05K 1/032 consisting of one materialH05K 2203/0796 Oxidant in aqueous solution...H05K 3/0017 Etching of the substrate by...H05K 3/0023 by exposure and development...H05K 3/0055 After-treatment, e.g. clean...H05K 3/10 in which conductive materia...H05K 3/381 by special treatment of the...H05K 3/4661 Adding a circuit layer by d...Y10T 29/49117 Conductor or circuit manufa...Y10T 29/49126 Assembling basesY10T 29/49155 Manufacturing circuit on or...Y10T 29/49165 by forming conductive walle...Y10T 428/12361 having aperture or cutY10T 428/24331 including nonapertured comp...
