Method for configuring an intelligent low power serial bus

US 5,938,742 A
Filed: 08/18/1995
Issued: 08/17/1999
Est. Priority Date: 08/18/1995
Status: Expired due to Term

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1. A method for detecting disconnection of a peripheral device from a bus comprising:

generation of an interrupt signal on said bus to a host computer for said bus from one peripheral device on said bus upon disconnection of another peripheral device on said bus wherein said one peripheral device is upstream on said bus from said another peripheral device; and

performance of an interrupt poll sequence by said host computer in response to said interrupt signal wherein said interrupt poll sequence detects disconnection of said another peripheral device.

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Abstract

A low power, single master, variable clock rate, daisy-chainable, serial bus connects a bus dispatch (master) to a chain of one or more daisy-chained peripheral devices (slaves). The bus has a bidirectional serial data line, a bidirectional clock line, unidirectional interrupt line, power and ground lines. A method for configuring the bus includes detecting connection and disconnection of a peripheral device to the bus. In the method, a last peripheral device on the bus is assigned the second status and all other peripheral devices on the bus are assigned the first status. Each peripheral device assigned the first status is configured to pass therethrough an interrupt signal on the bus. The last peripheral device is configured to invert an interrupt signal on the bus from a peripheral device that is newly attached to the bus. A peripheral device newly connected to the bus generates an interrupt signal that is inverted by the last peripheral device and transmitted over the bus to a host computer for the bus. Also, an interrupt signal is driven on the bus by one peripheral device on the bus upon disconnection of another peripheral device on the bus where the another peripheral device is downstream on the bus from the one peripheral device.

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63 Claims

1. A method for detecting disconnection of a peripheral device from a bus comprising:
- generation of an interrupt signal on said bus to a host computer for said bus from one peripheral device on said bus upon disconnection of another peripheral device on said bus wherein said one peripheral device is upstream on said bus from said another peripheral device; and
  
  performance of an interrupt poll sequence by said host computer in response to said interrupt signal wherein said interrupt poll sequence detects disconnection of said another peripheral device.
- View Dependent Claims (2, 3, 4)
- - 2. A method for detecting disconnection of a peripheral device from a bus as in claim 1 wherein performance of said interrupt poll sequence further comprises:
    - transmission of a command by said host computer to a peripheral device address downstream from said one peripheral device.
  - 3. A method for detecting disconnection of a peripheral device from a bus as in claim 2 wherein performance of said interrupt poll sequence further comprises:
    - performance of a disconnection sequence upon said host computer failing to receive a response to said command.
  - 4. A method for detecting disconnection of a peripheral device from a bus as in claim 3 wherein performance of said disconnection sequence comprises resetting said bus.

5. A method for detecting disconnection of a peripheral device from a bus comprising:
- assigning each peripheral device on said bus one of a first status and a second status wherein a last peripheral device on said bus is assigned said second status and all other peripheral devices on said bus are assigned said first status; and
  
  configuring each peripheral device assigned said first status to pass therethrough an interrupt signal on said bus from a peripheral device on said bus.
- View Dependent Claims (6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
- - 6. A method for detecting disconnection of a peripheral device from a bus as in claim 5 further comprising:
    - generation of said interrupt signal on said bus from one peripheral device upon disconnection of another peripheral device on said bus wherein said one peripheral device is upstream on said bus from said another peripheral device.
  - 7. A method for detecting disconnection of a peripheral device from a bus as in claim 6 wherein said bus is a daisy-chained bus, and further wherein said another peripheral device is immediately downstream from said one peripheral device.
  - 8. A method for detecting disconnection of a peripheral device from a bus as in claim 6 further comprising:
    - performing an interrupt poll sequence in a host computer for said bus upon receipt of said interrupt signal on said bus by said host computer.
  - 9. A method for detecting disconnection of a peripheral device from a bus as in claim 8 wherein performing said interrupt poll sequence further comprises:
    - selecting an address of a peripheral device on said bus.
  - 10. A method for detecting disconnection of a peripheral device from a bus as in claim 9 wherein selecting said address further comprises selecting an address that is different from an address of a peripheral device that generated an interrupt signal on said bus that was serviced prior to said interrupt signal.
  - 11. A method for detecting disconnection of a peripheral device from a bus as in claim 9 wherein performing said interrupt poll sequence further comprises:
    - a) transmitting a first command to a peripheral device having said selected address on said bus.
  - 12. A method for detecting disconnection of a peripheral device from a bus as in claim 11 wherein said first command is a command IRQ-Poll.
  - 13. A method for detecting disconnection of a peripheral device from a bus as in claim 11 wherein performing said interrupt poll sequence further comprises:
    - b) configuring said peripheral device having said selected address, upon receipt of said first command, (i) to pass an interrupt signal from a controller in said peripheral device to said host computer, and (ii) to block passage of any other interrupt signal through said peripheral device having said selected address.
  - 14. A method for detecting disconnection of a peripheral device from a bus as in claim 13 wherein performing said interrupt poll sequence further comprises:
    - c) checking said bus to determine whether said interrupt signal remained on said bus to said host computer after transmission of said first command.
  - 15. A method for detecting disconnection of a peripheral device from a bus as in claim 14 wherein performing said interrupt poll sequence further comprises:
    - d) modifying said selected address upon said checking step determining that said interrupt signal failed to remain on said bus to said host computer after transmission of said first command.
  - 16. A method for detecting disconnection of a peripheral device from a bus as in claim 15 wherein performing said interrupt poll sequence further comprises:
    - e) repeating steps a) through d) of said interrupt poll sequence until step c) determines that said interrupt signal remained on said bus to said host computer after transmission of said first command.
  - 17. A method for detecting disconnection of a peripheral device from a bus as in claim 14, or claim 16 wherein performing said interrupt poll sequence further comprises:
    - f) sending a second command upon said checking step determining that said interrupt signal remained on said bus to said host computer after transmission of said first command.
  - 18. A method for detecting disconnection of a peripheral device from a bus as in claim 17 wherein said second command is a command IRQ-Get.
  - 19. A method for detecting disconnection of a peripheral device from a bus as in claim 17 further comprising:
    - performing a disconnection sequence upon said host computer failing to receive a response to said second command.
  - 20. A method for detecting disconnection of a peripheral device from a bus as in claim 19 wherein performing a disconnection sequence comprises resetting said bus.

21. A method for detecting connection of a peripheral device to a bus comprising:
- generation of an interrupt signal on said bus to a host computer for said bus by a newly connected peripheral device;
  
  performance of an interrupt poll sequence; and
  
  performance of an address assign sequence upon said interrupt poll sequence failing to identify a source of said interrupt signal.

22. A method for detecting connection of a peripheral device to a bus comprising:
- assigning each peripheral device on said bus one of a first status and a second status wherein a last peripheral device on said bus is assigned said second status and all other peripheral devices on said bus are assigned said first status;
  
  configuring each peripheral device assigned said first status to pass therethrough an interrupt signal on said bus; and
  
  configuring said last peripheral device to invert said interrupt signal on said bus from a peripheral device that is newly attached to said bus.
- View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
- - 23. A method for detecting connection of a peripheral device to a bus as in claim 22 further comprising:
    - connecting a peripheral device to said bus wherein said newly connected peripheral device generates an interrupt signal that is inverted by said last peripheral device.
  - 24. A method for detecting connection of a peripheral device to a bus as in claim 23 further comprising:
    - performing an interrupt poll sequence in a host computer for said bus upon receipt of said interrupt signal on said bus by said host computer.
  - 25. A method for detecting connection of a peripheral device to a bus as in claim 24 wherein performing said interrupt poll sequence further comprises:
    - selecting an address of a peripheral device on said bus wherein said selected address is a first selected address.
  - 26. A method for detecting connection of a peripheral device to a bus as in claim 25 wherein said selecting said address further comprises selecting an address that is different from an address of a peripheral device that generated an interrupt signal on said bus that was serviced prior to said interrupt signal.
  - 27. A method for detecting connection of a peripheral device to a bus as in claim 25 wherein performing said interrupt poll sequence further comprises:
    - a) transmitting a first command to said peripheral device having said selected address.
  - 28. A method for detecting connection of a peripheral device to a bus as in claim 27 wherein said first command is a command IRQ-Poll.
  - 29. A method for detecting connection of a peripheral device to a bus as in claim 28 wherein performing said interrupt poll sequence further comprises:
    - b) configuring said peripheral device having said selected address, upon receipt of said first command, (i) to pass an interrupt signal from said peripheral device having said selected address to said host computer, and (ii) to block passage of an interrupt signal from any other peripheral device on said bus through said peripheral device having said selected address.
  - 30. A method for detecting connection of a peripheral device to a bus as in claim 29 wherein performing said interrupt poll sequence further comprises:
    - c) checking said bus to determine whether said interrupt signal remained on said bus to said host computer after transmission of said first command.
  - 31. A method for detecting connection of a peripheral device to a bus as in claim 30 wherein performing said interrupt poll sequence further comprises:
    - d) modifying said selected address upon said checking step determining that said interrupt signal failed to remain on said bus to said host computer after transmission of said first command.
  - 32. A method for detecting connection of a peripheral device to a bus as in claim 31 wherein performing said interrupt poll sequence further comprises:
    - e) comparing said modified selected address with the first selected address.
  - 33. A method for detecting connection of a peripheral device to a bus as in claim 32 wherein performing said interrupt poll sequence further comprises:
    - f) repeating steps a) through e) of said interrupt poll upon step e) determining that said modified selected address is not equal to said selected address wherein in repeating steps a) through e) said modified selected address is used as said selected address.
  - 34. A method for detecting connection of a peripheral device to a bus as in claim 32 further comprising:
    - performing an assign address sequence for said newly attached peripheral device upon step e) determining that said modified selected address is equal to said first selected address.

35. A method for detecting connection and disconnection of a peripheral device to a bus comprising:
- assigning each peripheral device on said bus one of a first status and a second status wherein a last peripheral device on said bus is assigned said second status and all other peripheral devices on said bus are assigned said first status;
  
  configuring each peripheral device assigned said first status to pass therethrough an interrupt signal on said bus;
  
  configuring said last peripheral device to invert an interrupt signal on said bus from a peripheral device that is newly attached to said bus;
  
  generation of an interrupt signal by a peripheral device newly connected to said bus that is inverted by said last peripheral device and transmitted over said bus to a host computer for said bus; and
  
  generation of said interrupt signal on said bus from one peripheral device on said bus upon disconnection of another peripheral device on said bus wherein said another peripheral device is downstream on said bus from said one peripheral device.
- View Dependent Claims (36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50)
- - 36. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 35 further comprising:
    - performing an interrupt poll sequence in said host computer for said bus upon receipt of said interrupt signal on said bus by said host computer.
  - 37. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 36 wherein performing said interrupt poll sequence further comprises:
    - selecting an address of a peripheral device on said bus wherein said selected address is a first selected address.
  - 38. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 37 wherein selecting said address further comprises selecting an address that is different from an address of a peripheral device that generated an interrupt signal on said bus that was serviced prior to said interrupt signal.
  - 39. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 37 wherein performing said interrupt poll sequence further comprises:
    - a) transmitting a first command to said peripheral device having said selected address.
  - 40. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 39 wherein said first command is a command IRQ-Poll.
  - 41. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 39 wherein performing said interrupt poll sequence further comprises:
    - b) configuring said peripheral device having said selected address, upon receipt of said first command, (i) to pass an interrupt signal from said peripheral device having said selected address to said host computer, and (ii) to block passage of an interrupt signal from any other peripheral device on said bus through said peripheral device having said selected address.
  - 42. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 41 wherein performing said interrupt poll sequence further comprises:
    - c) checking said bus to determine whether said interrupt signal remained on said bus to said host computer after transmission of said first command.
  - 43. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 42 wherein performing said interrupt poll sequence further comprises:
    - d) modifying said selected address upon said checking step determining that said interrupt signal failed to remain on said bus to said host computer after transmission of said first command.
  - 44. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 43 wherein performing said interrupt poll sequence further comprises:
    - e) comparing said modified selected address with the first selected address.
  - 45. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 44 wherein performing said interrupt poll sequence further comprises:
    - f) repeating steps a) through e) of said interrupt poll sequence until the first to occur of step e) determining that said modified selected address is not equal to said selected address and step c) determining that said interrupt signal remained on said bus to said host computer after transmission of said first command wherein in repeating steps a) through e) said modified selected address is used as said selected address.
  - 46. A method for detecting connection and disconnection of a peripheral device to a bus as in claim 44 further comprisingperforming an assign address sequence for said newly attached peripheral device upon step e) determining that said modified selected address is equal to said first selected address.
  - 47. A method for detecting connection and disconnection of a peripheral device from a bus as in claim 45 wherein performing said interrupt poll sequence further comprises:
    - g) sending a second command upon said checking step determining that said interrupt signal remained on said bus to said host computer after transmission of said first command.
  - 48. A method for detecting connection and disconnection of a peripheral device from a bus as in claim 47 wherein said second command is a command IRQ-Get.
  - 49. A method for detecting connection and disconnection of a peripheral device from a bus as in claim 47 further comprising:
    - performing a disconnection sequence upon said host computer failing to receive a response to said second command.
  - 50. A method for detecting connection and disconnection of a peripheral device from a bus as in claim 49 wherein performing a disconnection sequence comprises resetting said bus.

51. A bus initialization sequence for peripheral devices on a serial bus comprising:
- performing a bus reset sequence including toggling a bus power supply voltage;
  
  testing a signal state on a bus interrupt line of said serial bus to determine whether a peripheral device is on said serial bus;
  
  performing an address assign sequence after said bus reset sequence wherein each peripheral device on said serial bus is assigned an address by a bus dispatch unit in a host computer for said serial bus; and
  
  performing a peripheral configuration sequence after performing said address assign sequence wherein each peripheral device on said serial bus is configured for operation on said serial bus in said peripheral configuration sequence.
- View Dependent Claims (52, 53, 54, 55, 56)
- - 52. A bus initialization sequence for peripheral devices on a serial bus as in claim 51 wherein performing said address assign sequence further comprises:
    - testing a signal state on a bus interrupt line of said serial bus to determine whether a peripheral device is on said serial bus after said address initialization.
  - 53. A bus initialization sequence for peripheral devices on a serial bus as in claim 52 wherein performing said address assign sequence further comprises:
    - sending an assign address command that includes said address on said serial bus upon said testing of said signal state indicating that said peripheral device is on serial bus.
  - 54. A bus initialization sequence for peripheral devices on a serial bus as in claim 53 wherein performing said address assign sequence further comprises:
    - testing said signal state on said bus interrupt line of said serial bus to determine whether another peripheral device is on said serial bus after sending said assign address command.
  - 55. A bus initialization sequence for peripheral devices on a serial bus as in claim 54 wherein performing said address assign sequence further comprises:
    - sending an assign mid-peripheral command to said peripheral device upon said testing of said signal state indicating that said another peripheral device is on said serial bus.
  - 56. A bus initialization sequence for peripheral devices on a serial bus as in claim 54 wherein performing said address assign sequence further comprises:
    - modifying said address to obtain a next address.

57. An assign address sequence for peripheral devices on a serial bus comprising:
- testing a signal state on a bus interrupt line of said serial bus to determine whether a peripheral device is on said serial bus, the signal state being set to one value when at least one peripheral device is on said serial bus, the signal state being set to another value when there are no peripheral devices on said serial bus; and
  
  assigning each peripheral device on said serial bus an address by a bus dispatch unit in a host computer for said serial bus when the signal state indicates presence of at least one peripheral.
- View Dependent Claims (58, 59, 60, 61)
- - 58. An assign address sequence for peripheral devices on a serial bus as in claim 57 wherein assigning each peripheral device on said serial bus an address further comprises:
    - sending an assign address command, that includes said address, on said serial bus subsequent to said testing of said signal state on the bus interrupt line of said serial bus to determine whether said peripheral device is on said serial bus.
  - 59. An assign address sequence for peripheral devices on a serial bus as in claim 58 wherein assigning each peripheral device on said serial bus an address further comprises:
    - testing said signal state on said bus interrupt line of said serial bus to determine whether another peripheral device is on said serial bus after sending said assign address command.
  - 60. An assign address sequence for peripheral devices on a serial bus as in claim 59 wherein assigning each peripheral device on said serial bus an address further comprises:
    - sending an assign mid-peripheral command to said peripheral device upon said testing of said signal state indicating that said another peripheral device is on said serial bus.
  - 61. An assign address sequence for peripheral devices on a serial bus as in claim 60 wherein assigning each peripheral device on said serial bus an address further comprises:
    - modifying said address to obtain a next address.

62. A peripheral configuration sequence for peripheral devices on a serial bus comprising:
- initializing a peripheral device address;
  
  performing a get peripheral identification sequence after said address initialization for a peripheral device on said serial bus with said peripheral device address, wherein information including the data transfer speed of the peripheral device is sent to a bus dispatch; and
  
  performing a locate peripheral client sequence for said peripheral device on said serial bus with said peripheral device address.

63. A peripheral configuration sequence for peripheral devices on a serial bus comprising:
- initializing a peripheral device address;
  
  performing a get peripheral identification sequence after said address initialization for a peripheral device on said serial bus with said peripheral device address, wherein information including the data transfer speed of the peripheral device is sent to a bus dispatch; and
  
  performing an attach peripheral client sequence for said peripheral device on said serial bus with said peripheral device address.

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Current Assignee
Intellectual Ventures I LLC (Intellectual Ventures LLC)
Original Assignee
General Magic, Inc.
Inventors
Broedner, Walter F., Faddell, Anthony M.
Primary Examiner(s)
Sheikh, Ayaz R.
Assistant Examiner(s)
Pancholi, Jigar

Application Number

US08/516,857
Time in Patent Office

1,460 Days
Field of Search

395/309, 395/287, 395/829, 395/828, 395/281, 395/285, 395/306, 395/737, 395/727, 395/733, 395/835, 395/836, 395/837, 395/838, 395/839, 395/280, 395/282, 395/283, 395/284 , 395/289, 395/741
US Class Current

710/9
CPC Class Codes

G06F 13/4256 using a clocked protocol

Method for configuring an intelligent low power serial bus

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6 Assignments

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Abstract

146 Citations

63 Claims

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Method for configuring an intelligent low power serial bus

First Claim

6 Assignments

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Accused Products

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Abstract

146 Citations

63 Claims

Specification

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